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Design and Development of High Step-up DC-DC Converter to Realize High Efficiency and Reduced Voltage Stress

机译:实现高效率和降低电压应力的高升压DC-DC转换器的设计与开发

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This paper proposes a new high voltage gain and high-efficiency dc-dc converter. The proposed topology is formed by a coupled inductor to achieve high voltage gain and low stress on the active switch. The switch voltage stress is significantly low compared to the output voltage which enables the use of a low voltage rating MOSFET. Moreover, the voltage stress on output diode is decreased to 16% of the output voltage as compared with boost and other high step-up converters. Furthermore, the utilization of the coupled inductor eliminated the reverse recovery losses of diodes. The efficiency of the converter is hence improved. As compared with existing topologies, the proposed converter consists of the least number of components that decrease the overall system cost. The steady-state operation and analysis of the proposed converter are presented. The experimental results of a hardware prototype demonstrate the consistency with the theoretical analysis. The converter shows a peak efficiency of 96.7%.
机译:本文提出了一种新型的高电压增益和高效率的dc-dc转换器。所提出的拓扑由耦合电感器形成,以在有源开关上实现高电压增益和低应力。与输出电压相比,开关电压应力明显较低,从而可以使用额定电压较低的MOSFET。此外,与升压和其他高升压转换器相比,输出二极管上的电压应力降至输出电压的16%。此外,利用耦合电感器消除了二极管的反向恢复损耗。因此提高了转换器的效率。与现有拓扑相比,拟议的转换器由最少数量的组件组成,这些组件可降低总体系统成本。提出了该转换器的稳态工作和分析。硬件原型的实验结果证明了与理论分析的一致性。该转换器的峰值效率为96.7%。

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