17 Gbps wireless optical receiver in 80 nm CMOS

摘要

System considerations for high-speed wireless optical receivers are presented. A receiver is designed in 80 nm CMOS with a data-rate of up to 17 Gbps, measured error-free at a bit error rate (BER) of 10-12 with -2.8 dBm input optical power. According to the IrDA standards a BER of 10 suffices for a wireless optical link, thus the sensitivity at 17 Gbps evaluated for BER 10 is then -3.9 dBm. Measured for a 6 Gbps transmission the sensitivity can go down to -10 dBm. The receiver is designed with special features optimized for a wireless optical link. It contains a transimpedance amplifier, limiting amplifier, output line driver, an offset compensation and common-mode control loop as well as a DC light-current compensation circuit. The active area of the complete receiver is only 0.0094 mm. A very low power consumption of 18 mW is measured without the line driver. Small-signal parameters are measured and compared with simulations. The fabricated die is wire-bonded to a commercial 10 Gbps photo diode. Optical and large-signal measurements are performed. The circuit stands out first of all for the special features for wireless optical communications, the small area and low power consumption.