首页> 外文会议>IEEE European Solid State Circuits Conference >A Cortex-M3 Based MCU Featuring AVS with 34nW Static Power, 15.3pJ/inst. Active Energy, and 16 Power Variation Across Process and Temperature
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A Cortex-M3 Based MCU Featuring AVS with 34nW Static Power, 15.3pJ/inst. Active Energy, and 16 Power Variation Across Process and Temperature

机译:一种基于Cortex-M3的MCU,具有具有34nW静态功率,15.3pJ / inst的AVS。在整个过程和温度范围内,有功电能和16%的功率变化

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Power and energy efficiency poses a prime constraint on IoT SoCs. Dynamic voltage and frequency scaling (DVFS) - in combination with adaptive voltage scaling (AVS) - can trade performance for power matching the workload. However, classic timing closure leads to substantial power variations across process and temperature, especially from SS/Cold to FF/Hot due to leakage. This paper presents an ARM Cortex-M3 based MCU with integrated voltage regulator featuring AVS, which achieves for the CPU incl. 8kB SRAM 34nW static power, 15.3pJ/instruction active energy and 16% power variations across process and temperature (-40-120°C) corners measured in silicon. The digital subsystem employs a new replica scheme combining replica circuits and in-situ monitors to track critical paths under the inter/intra-die variations. Mandating AVS, we show a novel methodology for logic synthesis with optimal usage percentage per Vth level, at which point the power consumption is balanced and minimized across process and temperature.
机译:电力和能源效率对物联网SoC构成了主要限制。动态电压和频率缩放(DVFS)与自适应电压缩放(AVS)相结合,可以以性能与功率匹配的方式进行工作。但是,经典的时序收敛会导致整个过程和整个温度范围内的功率发生很大变化,尤其是由于泄漏导致SS / Cold到FF / Hot的差异。本文介绍了一种基于ARM Cortex-M3的MCU,具有集成了带有AVS的稳压器,可实现包括CPU在内的CPU。 8kB SRAM 34nW静态功率,15.3pJ /指令有功电能以及在硅中测得的整个过程和温度(-40-120°C)角处的功率变化为16%。数字子系统采用了一种新的复制方案,该方案结合了复制电路和原位监控器来跟踪芯片间/芯片内变化下的关键路径。强制执行A​​VS,我们展示了一种新颖的逻辑综合方法,具有每V的最佳使用百分比 级别,此时功耗在整个过程和温度范围内达到平衡并最小化。

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