A Novel Time-Domain Phase Quantization Noise Extraction for a VCO-based Quantizer

摘要

A highly linear SAR-VCO MASH delta-sigma ADC architecture is presented. OTA based analog integrators are not needed whereby the ADC is mostly digital and process scaling friendly. A new technique is introduced to extract the quantization noise of the VCO-based quantizer as a PWM signal using digital circuitry. This technique is independent of the OSR and the input signal amplitude of the VCO-based quantizer making it attractive for higher bandwidth applications. The proposed technique is demonstrated with a 0-1-1 MASH deltasigma architecture. Behavioral simulations show second order noise shaping with 75dB SNDR for an OSR of 20.