首页> 外文会议>Telecommunications Forum >PSSS Transmitter for a 100 Gbps Data Rate Communication in Thz Frequency Band
【24h】

PSSS Transmitter for a 100 Gbps Data Rate Communication in Thz Frequency Band

机译:用于Thz频段100 Gbps数据速率通信的PSSS发送器

获取原文

摘要

Parallel sequence spread spectrum (PSSS) is a versatile spreading technique suitable for high-speed wireless communication. We are aiming for transmission rates up to 100 Gbps in the terahertz frequency band. Here, we propose a novel transmitter architecture comprising of 15 parallel PSSS encoders used in conjunction with a high-speed analog multiplexer (MUX) and DACs. In our design, PSSS encoders (with 4 bit/sIHz spectral efficiency) and DACs operate a low symbol frequency of 1.67 GHz wherein the analog MUX runs at a chip rate of 30 GHz to achieve 100 Gbps. Our scheme is based on a parallel PSSS encoding of the input signal using an analog MUX to process the parallel output results. To demonstrate the potential of a parallel PSSS encoding, we verified the transmitter architecture on Virtex ultrascale FPGA (VCD108) and implemented the design on GlobalFoundries 28 nm FDSOI technology, showing a PSSS symbol rate of 1.785 GHz to achieve above 100 Gbps. The transmitter design of 15 parallel encoders occupies a chip area of 0.0073 mm2with a power consumption of 20.882 mW and has an energy efficiency of 0.21 p.j/bit
机译:并行序列扩频(PSSS)是一种适用于高速无线通信的通用扩频技术。我们的目标是在太赫兹频段内达到100 Gbps的传输速率。在这里,我们提出了一种新颖的发射机架构,该架构包括与高速模拟多路复用器(MUX)和DAC结合使用的15个并行PSSS编码器。在我们的设计中,PSSS编码器(具有4位/ sIHz的频谱效率)和DAC在1.67 GHz的低符号频率下工作,其中模拟MUX以30 GHz的码片速率运行以达到100 Gbps。我们的方案基于使用模拟MUX对输入信号进行并行PSSS编码来处理并行输出结果。为了演示并行PSSS编码的潜力,我们在Virtex超大规模FPGA(VCD108)上验证了发送器体系结构,并在GlobalFoundries 28 nm FDSOI技术上实施了该设计,显示出1.785 GHz的PSSS符号率可达到100 Gbps以上。 15个并行编码器的发射器设计占用0.0073 mm的芯片面积 2 功耗为20.882 mW,能量效率为0.21 p.j / bit

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号