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Novel Multirate Digital Filter for EEG on FPGA

机译:FPGA上EEG的新型多速率数字滤波器

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A new denoising multirate system method of using field-programmable gate array (FPGA) chip for bio-chip design & implementation of EEG signal is appeared in this article. The ALTERA Cyclone II FPGA board development board implements this bio-chip in real-time with processors EP2C35F672C6 for the proper data accuracy. Modelsim is used for simulation of biochip design in Verilog HDL. In this paper denoising on multirate system is used with support of up-sampler or interpolate, moving average filter and downs-sampler or decimator for removing of noise by bio-chip. This biochip shows good enough electrical characteristics such as less area and power, low voltage & current, enough memory storage spaces, null delay.
机译:本文出现了使用用于生物芯片设计和EEG信号的生物芯片设计和实现的现场可编程门阵列(FPGA)芯片的新的去噪多型系统方法。 Altera Cyclone II FPGA板开发板实时实现了这一生物芯片,用于AP2C35F672C6的适当数据准确性。 MODELEIM用于Verilog HDL中的Biochip设计模拟。在本文上,在多速率系统上的去噪与上采样器或插入的支持,移动平均滤波器和倒档 - 采样器或Defimator通过生物芯片去除噪声。该Biochip显示出足够的电气特性,例如较少的区域和电源,低电压和电流,足够的内存存储空间,空延迟。

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