首页> 外文会议>IEEE Electron Devices Technology and Manufacturing Conference >Design and Technology Co-Optimization for exploring Power, Performance, Area and Manufacturability Trade-offs in Advanced FDSOI and FinFET Technologies
【24h】

Design and Technology Co-Optimization for exploring Power, Performance, Area and Manufacturability Trade-offs in Advanced FDSOI and FinFET Technologies

机译:设计和技术共同优化,以探索先进的FDSOI和FinFET技术的功率,性能,面积和可制造性之间的取舍

获取原文

摘要

Advanced Technology Development requires detailed and extensive Design and Technology Co-optimization (DTCO), from device to design to application, to balance system-dependent Power, Performance and Area (PPA) with manufacturability of the technology for steep yield ramp in production. The multi-dimensional exploration and trade-off analysis requires deeper understanding of the process, lithography, device, digital, analog and memory design constraints, as well as application- and system-level implications at a very early stage of technology development. In this paper, we will present the top challenges, mitigation and trade-offs needed to realize an optimized solution in both FDSOI and FinFET Technologies.
机译:先进技术开发需要从设备到设计再到应用的详细,广泛的设计和技术协同优化(DTCO),以平衡与系统相关的功率,性能和面积(PPA),以及该技术的可制造性,以实现产量的急剧上升。多维探索和权衡分析要求在技术开发的早期阶段就对过程,光刻,设备,数字,模拟和内存设计约束以及应用程序和系统级含义有更深入的了解。在本文中,我们将介绍在FDSOI和FinFET技术中实现优化解决方案所需的主要挑战,缓解和取舍。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号