Avoidance of limit cycles in digitally controlled buck converters by optimizing PI parameters

摘要

The digital control power supply has been widely used by virtue of its many advantages. However, it may cause limit cycle oscillations due to quantization in the feedback loop when the switching frequency is high. This paper presents an analytical model of buck converter using state space average method and derives the equilibrium expression in steady state, and the requirement for DPWM resolution is investigated. The amplitude and frequency of the oscillations that may occur on two duty cycle levels are investigated, which are related to the controller parameters. It is shown that limit cycles on two duty cycle levels will not occur by adjusting the ratio of proportional integral coefficient. Finally, the verification of the analysis is performed through simulations.