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Out-of-Order Execution of Buffered Function Units in Exposed Data Path Architectures

机译:公开数据路径体系结构中缓冲功能单元的乱序执行

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Some of the newer processor architectures are no longer based on registers in order to increase their potential of instruction-level parallelism. Instead, they expose their data paths to the compiler so that the program is able to directly move data values between function units using suitable instructions. Some of these architectures require a synchronous transfer of data values while others use asynchronous transfers by buffering values. In this paper, we discuss the out-of-order execution of function units of exposed data path architectures with asynchronous data transfers. The execution of these function units may locally deviate from the program order which is in analogy to dynamic scheduling used by processors with out-of-order execution. Since our out-of-order execution has only effects inside the function units, it requires no modifications of the compiler or instruction set. We have implemented different variants on FPGAs, and evaluated these for a set of application scenarios showing that the out-of-order extension can considerably increase the performance of these architectures.
机译:一些较新的处理器体系结构不再基于寄存器,以增加其潜在的指令级并行性。相反,它们将其数据路径公开给编译器,以便程序能够使用适当的指令在功能单元之间直接移动数据值。这些体系结构中的某些体系结构需要同步传输数据值,而其他体系结构则通过缓冲值来使用异步传输。在本文中,我们讨论了具有异步数据传输的公开数据路径体系结构的功能单元的无序执行。这些功能单元的执行可能会局部偏离程序顺序,这类似于无序执行的处理器所使用的动态调度。由于乱序执行仅在功能单元内部起作用,因此不需要修改编译器或指令集。我们已经在FPGA上实现了不同的变体,并针对一组应用场景对它们进行了评估,结果表明无序扩展可以显着提高这些架构的性能。

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