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Identifying Optimization Opportunities Within Kernel Execution in GPU Codes

机译:在GPU代码中识别内核执行中的优化机会

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Tuning codes for GPGPU architectures is challenging because few performance tools can pinpoint the exact causes of execution bottlenecks. While profiling applications can reveal execution behavior with a particular architecture, the abundance of collected information can also overwhelm the user. Moreover, performance counters provide cumulative values but does not attribute events to code regions, which makes identifying performance hot spots difficult. This research focuses on characterizing the behavior of GPU application kernels and its performance at the node level by providing a visualization and metrics display that indicates the behavior of the application with respect to the underlying architecture. We demonstrate the effectiveness of our techniques with LAMMPS and LULESH application case studies on a variety of GPU architectures. By sampling instruction mixes for kernel execution runs, we reveal a variety of intrinsic program characteristics relating to computation, memory and control flow.
机译:GPGPU架构的调整代码是具有挑战性的,因为很少的性能工具可以针对执行瓶颈的确切原因。虽然分析应用程序可以通过特定架构揭示执行行为,但收集的信息的丰富也可以压倒用户。此外,性能计数器提供累积值,但不会将事件属性到代码区域,这使得识别性能热点困难。本研究侧重于通过提供一种可视化和度量显示器来表征GPU应用程序内核的行为及其在节点级别的性能,所述可视化和指标显示指示应用程序的行为相对于底层体系结构。我们展示了我们对局部GPU架构的LAMMPS和LULESH应用案例研究的技术的有效性。通过采样指令混合来进行内核执行运行,我们揭示了各种与计算,存储器和控制流程相关的内部程序特性。

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