UFRGSPlace: Routability driven FPGA placement algorithm for heterogeneous FPGAs

摘要

In this paper, we present an algorithm for routability driven heterogeneous FPGA placement. We developed it to participate in the ISPD 2016 Contest [1] and we received a distinction as 4th place. We placed all FPGA components globally using quadratic placement, spreaded them radially, packed the logic block cells, legalized them (assigned them to their correct slots within the FPGA without overlaps) and performed a detailed placement step with a threshold acceptance [2] algorithm for fine adjustments.