Digital correction of mismatches in time-interleaved ADCs for digital-RF receivers

摘要

Time-interleaving analog-to-digital converters (ADCs) decreases the required sampling rate for one ADC to achieve gigasamples per second (GS/s) rates. The gain and timing mismatches among the ADCs generate aliasing signals, degrading the spurious-free dynamic range of the time-interleaved ADC (TI-ADC). The conventional digital correction methods for TI-ADCs have not considered application to direct-RF sampling receivers. We present a digital correction method for M-channel TI-ADCs in the receivers. The proposed method employs in-phase/quadrature-phase (I/Q) downconversion mixers and cascaded integrator-comb (CIC) filters in the receiver. This allows the correction circuit (except for mismatch estimation) to have fewer building blocks than the conventional methods: one adder, one multiplier, and no filter. Simulations and measurements show that the proposed method completely reduces the aliasing signals below the noise floor of 4- and 2-channel 12-bit TI-ADCs, respectively.