A 60–90GHz stagger-tuned low-noise amplifier with 1.2dBm OP1dB in 65nm CMOS

摘要

This paper presents a 60-90 GHz wide-bandwidth low noise amplifier (LNA) implemented in a 65nm CMOS low power process with ft of 160GHz. The LNA which is composed of three common source (CS) amplifier stages with inductive source degenerated first stage achieves a wideband response through stagger tuning of the poles of the amplifier stages. The CS topology is chosen for low power consumption and the first stage is source degenerated to improve the linearity and noise figure while still maintaining a moderate gain. Measured results show a maximum gain of 9.2dB with a -3dB bandwidth from 60-90GHz and S11 and S22 better than -12dB. It has a noise figure between 6.4 and 8dB with an OP1dB of 1.2dBm at 75GHz, a power consumption of 36.4mW from a 1.4V supply and 0.936mm²chip area. To the best of the authors' knowledge, this work demonstrates the highest bandwidth with OP1dB greater than 0dBm from 60-90 GHz and power consumption less than 40mW.