Comparative analysis of performance for seven and five levels inverter

摘要

Multilevel inverter has numerous features for high and medium voltage applications. The size and complexity of multilevel inverter topologies limits its applications. In this paper performance comparison of seven and five levels inverter is presented. For both inverters cascaded H-bridge and reduced switched topologies are used. Performance of the inverters is compared topological and by reduction in total harmonics distortion (THD) using the sinusoidal pulse width modulation (SPWM) control techniques. These techniques are phase disposition (PD), phase opposition disposition (POD), alternate phase opposition disposition (APOD), phase shift (PS) and hybrid PWM. Models are implemented in Matlab Simulink environment and results are compared. In reduced switch topologies increasing the output voltage level by minimizing the number of switching devices produce significant reduction in total harmonic distortion. Thus the conventional topology can be replaced with proposed reduced switched structure with the benefit of reducing losses, size and cost.