A low-power digital GFSK receiver with mid-value filtering frequency offset estimator and soft anti-overlap slicer

摘要

In this paper, a digital Gaussian frequency-shift keying receiver with a data-aided mid-value filtering frequency offset estimator (MFFOE) and a soft anti-overlap slicer (SAS) is presented. The presented MFFOE can estimate carrier frequency offset (CFO) rapidly with a mid-value selector and a Kalman filter. The proposed SAS can eliminate the influence of intersymbol interference. Cooperated with MFFOE and SAS, the receiver offers considerable improvement on bit error rate (BER). The design is implemented in a standard 180-nm CMOS technology. The chip area is only 0.70 mm². When the full function is activated, the power consumption is 0.56 mW from a 1.5-V supply. The verification results show that at 14 dB SNR and 200 KHz CFO, the proposed receiver achieves BER <; 0.1%.