Demodulation of 8PSK Signal with Gardner Bit Synchronization Using FPGA

摘要

In this paper, a new method of bit synchronization of 8PSK signal based on Gardner algorithm is proposed. When using Gardner bit synchronization, some improvements must be made to accommodate the demodulation of the 8PSK signal. Firstly, a detailed analysis of mathematical model for the Gardner bit synchronization is made, and then the algorithm simulation is accomplished on Quartus and ModelSim joint platform by Verilog HDL. The implement result by FPGA shows the feasibility and the stability of the proposed algorithms.