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A low power high efficient radio frequency clock generator for bio-implants

机译:用于生物植入物的低功率高效射频时钟发生器

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Now a days in VLSI, System on Chip (SoC) design is replacing the systems on board due to its high performance, less area and low power. Though Complementary Metal Oxide Semiconductor (CMOS) devices are playing a key role in the realization of low power million transistor circuits are not useful in sub-threshold region due to their charge leakage. The major abnormalities of these devices are jitter, skew and high power consumption which is amplified in Radio Frequency (RF) range. This paper deals with the realization of a Real Time RF Clock Generator circuit implemented with Carbon Nano Tube Field Effect Transistor (CNTFET) and Fin Field Effect Transistor (FINFET) devices is considered for clocking digital circuits in RF range. RF clock uses differential amplifier with buffer signal, provides less offset frequency, fast data transmission, susceptible at low voltage level and reduce jitter. The power dissipation, area and performance of these circuits are compared with the CMOS circuits with power supply of 1.8v and frequency of 2 MHz. It is observed that -% power, -% of area and -% of delay are reduced.
机译:如今在VLSI中,片上系统(SoC)设计由于其高性能,较小的面积和低功耗而正在取代板载系统。尽管互补金属氧化物半导体(CMOS)器件在实现低功耗方面起着关键作用,但由于电荷泄漏,百万亚晶体管电路在亚阈值区域中无用。这些设备的主要异常是抖动,偏斜和高功耗,这些异常会在射频(RF)范围内放大。本文讨论了一种实时射频时钟发生器电路的实现,该电路由碳纳米管场效应晶体管(CNTFET)和鳍式场效应晶体管(FINFET)器件实现,用于为RF范围内的数字电路提供时钟。 RF时钟使用带有缓冲信号的差分放大器,提供较少的失调频率,快速的数据传输,在低电压电平下易受干扰并减少了抖动。将这些电路的功耗,面积和性能与电源为1.8v,频率为2 MHz的CMOS电路进行了比较。可以看出,降低了-\%功率,-\%的面积和-\%的延迟。

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