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A new learning method for inference accuracy, core occupation, and performance co-optimization on TrueNorth chip

机译:TrueNorth芯片上用于推理准确性,核心占用和性能共同优化的新学习方法

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IBM TrueNorth chip uses digital spikes to perform neuromorphic computing and achieves ultrahigh execution parallelism and power efficiency. However, in TrueNorth chip, low quantization resolution of the synaptic weights and spikes significantly limits the inference (e.g., classification) accuracy of the deployed neural network model. Existing workaround, i.e., averaging the results over multiple copies instantiated in spatial and temporal domains, rapidly exhausts the hardware resources and slows down the computation. In this work, we propose a novel learning method on TrueNorth platform that constrains the random variance of each computation copy and reduces the number of needed copies. Compared to the existing learning method, our method can achieve up to 68.8% reduction of the required neuro-synaptic cores or 6.5× speedup, with even slightly improved inference accuracy.
机译:IBM TrueNorth芯片使用数字峰值执行神经形态计算,并实现超高执行并行度和功效。但是,在TrueNorth芯片中,突触权重和尖峰的低量化分辨率显着限制了部署的神经网络模型的推理(例如分类)准确性。现有的解决方法,即,对在空间和时间域中实例化的多个副本上的结果求平均,会迅速耗尽硬件资源并减慢计算速度。在这项工作中,我们提出了一种在TrueNorth平台上的新颖的学习方法,该方法可以约束每个计算副本的随机方差并减少所需副本的数量。与现有的学习方法相比,我们的方法最多可以减少68.8%的所需神经突触核心或6.5倍加速,甚至可以稍微提高推理精度。

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