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Improved EPLL performance using multiple sinusoidal signal integrators for grid-connected VSC system synchronisation

机译:使用多个正弦信号积分器改善并网VSC系统同步的EPLL性能

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This paper presents a novel synchronisation technique, which is based on the structural modification of the conventional Enhanced Phase-Locked Loop (EPLL) by introducing Multiple Sinusoidal Signal Integrator (MSSI) modules. The proposed MSSI-EPLL proves to overcome the weakness of the EPLL by employing adaptive MSSI modules in both amplitude and frequency loops to effectively eliminate low order harmonics under distorted AC grid condition, without sacrificing the dynamic performance. The test bench setup also considers the application of a single-to-ground fault at the Point of Common Coupling (PCC) and a step change in AC system frequency. For these test scenarios, the EPLL suffers noticeable periodic ripples during the dynamic process due to phase and amplitude jumps, with slower response time and steady oscillations during frequency change. But, these drawbacks are significantly mitigated by the MSSI-EPLL, as proven mathematically and confirmed through simulation studies.
机译:本文提出了一种新颖的同步技术,该技术基于对传统增强型锁相环(EPLL)的结构修改,方法是引入多个正弦信号积分器(MSSI)模块。提出的MSSI-EPLL通过在振幅和频率环路中均采用自适应MSSI模块来克服EPLL的弱点,从而有效消除了交流电网条件下的低阶谐波,而又不牺牲动态性能。测试台的设置还考虑了在公共耦合点(PCC)上单接地故障的应用以及交流系统频率的阶跃变化。对于这些测试场景,由于相位和幅度跳跃,EPLL在动态过程中会遭受明显的周期性波动,响应时间较慢,并且在频率变化时会产生稳定的振荡。但是,正如数学上证明并通过仿真研究证实的那样,MSSI-EPLL大大减轻了这些缺陷。

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