A 0.1-to-5 GHz wideband ΔΣ fractional-N frequency synthesizer for software-defined radio application

摘要

This paper proposes a wideband ΔΣ fractional-N frequency synthesizer for software-defined radio application. The frequency synthesizer has two modes: the regular mode and the low-power mode. The regular mode and the low-power mode are selected to generate lower band frequency output for low-power applications and low band frequency signal with lower phase noise performance, respectively. The frequency synthesizer is implemented in 65 nm CMOS process. The measured frequency range can cover from 0.1 GHz to 5 GHz. The maximum power at regular mode is 21 mW and the power consumption at low-power mode is 10.2 mW. The measured phase noise at regular mode is -120.3dBc/Hz at 1MHz offset at carrier frequency 2.75375 GHz and the phase noise at low-power mode is -122.8dBc/Hz at 1MHz offset at carrier frequency 1.3525 GHz.