Compact model based design space exploration for CMOS hall effect sensors

摘要

This paper presents an analytical model for Hall Plates. The model includes the calculation of some key features such as Hall voltage, resolution, sensitivity, and signal-to-noise ratio (SNR) for different device geometries. The model is used to determine the device geometries for the best optimization parameters in the design of Hall plates. The model is validated with the measurements taken from a Hall Plate.