A Compact S-Box Module for 128/192/256-bit Symmetric Cryptography Hardware

摘要

This article describes a compact implementation in hardware of S-Boxes for Twofish Algorithm in Field Programmable Gate Array - one of the Advanced Encryption Standard (AES) finalists. The core was implemented using Altera Quartus Cyclone board. The code is totally portable and can be used in any FPGA family because it was developed using the VHDL patterns. The function was implemented for 128-bit word and 128, 192 and 256-bit key. The main goal of this work was the implementation of a compact and modular S-Box module for Twofish algorithm that can find a wide range of applications and that can be choosen as an alternative from AES-Rijndael.