In this paper, we show how bilinear pairings can be implemented on modern smart card architectures. We do this by providing a memory-efficient implementation of the eta pairing on accumulator based cryptographic coprocessors. We provide timing results for different key-sizes on a state of the art smart card, the Infineon SLE 78. On one hand, our results show that pairings can efficiently be computed on smart cards. On the other hand, our results identify bottlenecks that have to be considered for future smart card designs.
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