OPTMR: Optimal data flow graph partitioning for triple modular redundancy against hardware Trojan in reconfigurable hardware

摘要

Hardware Trojans have become a significant threat to computing reliability and data security in reconfigurable hardware. One of the most effective techniques of run-time detection and recovery is based on Triple Modular Redundancy (TMR) mechanism; however, this mechanism causes a large resource overhead because the protected circuit needs to be totally duplicated twice for detection stage and decision stage. This paper proposes a novel methodology called Optimal Partitioning Triple Modular Redundancy (OPTMR) that optimizes the Data Flow Graph (DFG) partitioning to reduce the total overhead of TMR. The mathematical relationship between DFG partitioning and total overhead is discussed and the principle of DFG node division is presented. The efficiency and effectiveness of OPTMR is verified through simulation on an actual Field Programmable Gate Array (FPGA) device.