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Design of FIR Filter using reconfigurable MAC unit

机译:使用可重构MAC单元的FIR滤波器设计

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摘要

In Digital signal processing, Filter is used almost in all devices. Filters are used to extract the useful part from the input signal and the required part of the signal is reached to the receiver. For linear characteristics devices, FIR filter is used which is nothing but a combination of multiplier and adder. In this paper FIR filter has been designed by using a reconfigurable Booth multiplier and a Carry Look Ahead Adder. Combination of Booth multiplier and Carry Look Ahead adder makes FIR filter faster. RTL synthesis has been done by using Xilinx 14.3 and simulation is done by using Modelsim 6.4a. Proposed MAC unit is efficient in terms of speed and complexity and has achieved maximum frequency as 307.977MHz. We have achieved delay for MAC unit as 3.247ns and power 0.242 watt.
机译:在数字信号处理中,滤波器几乎用于所有设备。滤波器用于从输入信号中提取有用部分,并将信号的所需部分到达接收器。对于线性特性器件,使用FIR滤波器,它只是乘法器和加法器的组合。在本文中,FIR滤波器是通过使用可重新配置的Booth乘法器和Carry Look Ahead加法器设计的。将Booth乘法器和Carry Look Ahead加法器结合使用可使FIR滤波器更快。 RTL综合已使用Xilinx 14.3完成,而仿真已使用Modelsim 6.4a完成。提出的MAC单元在速度和复杂性方面都是有效的,并且已达到307.977MHz的最大频率。我们已经实现了MAC单元的延迟为3.247ns,功率为0.242瓦。

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