Greedy approach based heuristics for partitioning SpMxV on FPGAs

摘要

To eliminate the overhead of zero padding in sparse matrix-vector multiplication (SpMxV), prior works have been focusing on partitioning a sparse matrix into row vectors sets (RVS's) or sub-matrices. Nevertheless, performance degraded still due to the sparsity pattern of a sparse matrix. In this paper, we propose a heuristics, called recursive merging, which uses greedy approach to recursively merge those row vectors of nonzeros in a matrix into the RVS's, such that each set included is ensured a local optimal solution. For ten uneven benchmark matrices from the University of Florida Sparse Matrix Collection, our proposed partitioning algorithm is always identified as the method with the highest mean density (over 96%). An average speedup of 249X is thus achieved for all these ten matrices when 32 processors are allocated for implementation SpMxV on XC7V485T FPGAs.