The simulation of biomedical models often requires the numerical integration of ordinary differential equation systems, a computationally intensive task that can be accelerated well by deeply-pipelined FPGA-based accelerators. Since the main design target is throughput, larger FPGA devices can easily be exploited by scaling-up the number of parallel datapath instances on a chip. To this end, reducing the area of each datapath becomes a key optimisation. High-level synthesis can be employed to generate custom simulation accelerators from standardised cell descriptions in CellML. In this work, we improve this process by inserting LLVM into the flow to pre-optimise the simulation models generated from CellML for hardware synthesis. This is achieved not only by the selective application of general-purpose optimisation passes, but also by adding new domain-specific optimisations, including unsafe floating-point transformations, to the optimisation flow. We investigate their effect on the quality-of-results and show that a novel strategy using our optimisations outperforms standard strategies, such as LLVM's -Oz (aggressive size reduction), when applied for hardware synthesis in 99 out of 146 example models. Our approach, which reduces area by up to 25%, leads to the smallest implementations for four models examined in detail, and allows a particularly complex cell model to fit on the target FPGA device for the first time.
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