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Impedance matching networks for current output integrated circuits

机译:电流输出集成电路的阻抗匹配网络

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This paper is aimed to solve the problem of wideband optimum power transferring between low impedance current output high speed integrated circuits and standard 50 Ohm load. High amplitude current output circuits face some implementation obstacles, as an instance, in the TSMC 0.18 um CMOS process, in order to make the current carrying metal trace withstand to almost 80-120 mA, the trace should have characteristic impedance of about 6.25 Ohm, and consequently, the output should be terminated by a load having the same value as current carrying trace owns which leads to impedance mismatch. This paper presents on-chip and off-chip impedance matching networks to eliminate this obstacle. Two off-chip circuits (on 1 mm FR4) and one integrated circuit are presented with design details and measurements. Matched system has shown almost sharp band-pass characteristics having a center frequency of 2.4 GHz with 800 MHz bandwidth.
机译:本文旨在解决低阻抗电流输出高速集成电路与标准50欧姆负载之间的宽带最佳功率传输问题。高振幅电流输出电路面临一些实施障碍,例如,在台积电0.18 um CMOS工艺中,为了使载流金属走线承受近80-120 mA的电流,走线应具有约6.25欧姆的特性阻抗,因此,输出端应接一个负载,该负载的值应与载流迹线的负载值相同,从而导致阻抗失配。本文提出了片上和片外阻抗匹配网络,以消除这一障碍。介绍了两个片外电路(在1 mm FR4上)和一个集成电路,其中包含设计细节和测量结果。匹配的系统显示出几乎清晰的带通特性,其中心频率为2.4 GHz,带宽为800 MHz。

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