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A pixel-configurable CMOS image sensor for an intelligent surveillance system

机译:用于智能监控系统的像素可配置CMOS图像传感器

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A CMOS Image Sensor (CIS) mounted on a surveillance system does not always record a picture in a high resolution mode. In a normal state without any events or accidents, it is possible to take a picture in a low resolution mode to reduce power consumption. In this paper, a novel low power CIS which has two kinds of resolution mode is discussed to implement an intelligent surveillance system. Further, a pixel sub-sampling and a column shut-down technique are proposed. The prototype CIS chip is based on a 0.1μm CMOS process and satisfies a QVGA resolution (320×240) with a pitch of 5.0 μm and a 4-Tr active-pixel sensor structure. The fabricated CIS is composed of an analog correlated double sampling (CDS), an 8-bit single-slope ADC, and a digital counter. The operating speed of the CIS is 50 frame/s with a power consumption of 9.8mW at 2.8V(Analog)/1.5 V(Digital) power supply. When the pixel-configurable technique is used, the power consumption is about 2.7mW in a 1/4 low resolution mode. Therefore, the power consumption is drastically reduced, when the proposed technique is adopted.
机译:安装在监视系统上的CMOS图像传感器(CIS)并不总是以高分辨率模式记录图像。在没有任何事件或事故的正常状态下,可以以低分辨率模式拍摄照片以减少功耗。本文讨论了一种具有两种分辨率模式的新型低功耗CIS,以实现智能监控系统。此外,提出了像素子采样和列关闭技术。原型CIS芯片基于0.1μmCMOS工艺,并满足间距为5.0μm的QVGA分辨率(320×240)和4-Tr有源像素传感器结构的要求。预制的CIS由一个模拟相关双采样(CDS),一个8位单斜率ADC和一个数字计数器组成。 CIS的运行速度为50帧/秒,在2.8V(模拟)/1.5 V(数字)电源下的功耗为9.8mW。当使用像素可配置技术时,在1/4低分辨率模式下的功耗约为2.7mW。因此,当采用所提出的技术时,大大降低了功耗。

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