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A low power and low distortion VCO based ADC using a pulse frequency modulator

机译:使用脉冲频率调制器的低功耗,低失真,基于VCO的ADC

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This paper shows a novel VCO based ADC which uses an inverter delay line as a monostable to implement a pulse frequency modulator. The inverter delay line doubles as a Time to Digital converter, providing a multibit digital output similar to a ring oscillator. The pulse frequency modulator is based on a gm-C integrator, operating as a closed loop transconductor for the low bandwidth input signal path and as a charge pump for the monostable feedback. This way a high linearity is achieved while the total power consumption is kept on the order of a calibrated VCO-ADC. The paper shows the basic system level operation and behavioral simulations, and also a transistor level design example in 0.25µm CMOS technology.
机译:本文展示了一种新颖的基于VCO的ADC,该ADC使用反相器延迟线作为单稳态来实现脉冲频率调制器。反相器延迟线是Time-Digital转换器的两倍,提供类似于环形振荡器的多位数字输出。脉冲频率调制器基于gm-C积分器,用作低带宽输入信号路径的闭环跨导,并用作单稳态反馈的电荷泵。这样,在将总功耗保持在校准的VCO-ADC数量级的同时,实现了高线性度。本文展示了基本的系统级操作和行为仿真,以及0.25µm CMOS技术中的晶体管级设计实例。

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