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Image processing system architecture using parallel arrays of digital signal processors

机译:图像处理系统架构使用数字信号处理器的并行阵列

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The paper describes the requirements of a high definition, high speed image processing system. Different types of parallel architectures were considered for the system. Advantages and limitations of SIMD and MIMD architectures are briefly discussed for image processing applications. A parallel image processing system based on MIMD architecture has been developed using multiple digital signal processors which can communicate with each other through an interconnection network. Texas Instruments TMS320C40 digital signal processors have been selected because they have a powerful floating point CPU supported by fast parallel communication ports, a DMA coprocessor and two memory interfaces. A five processor system is described in the paper. The EISA bus is used as the host interface and VISION bus is used to transfer images between the processors. The system is being used for automated non-contact inspection in which electro-optic signals are processed to identify manufacturing problems.
机译:本文描述了高清晰度高速图像处理系统的要求。系统考虑了不同类型的并行架构。简要讨论了SIMD和MIMD架构的优点和局限性用于图像处理应用。已经使用多个数字信号处理器开发了一种基于MIMD架构的并行图像处理系统,该数字信号处理器可以通过互连网络彼此通信。 Texas Instruments TMS320C40已经选择了数字信号处理器,因为它们具有由快并并行通信端口,DMA协处理器和两个存储器接口支持的强大的浮点CPU。本文描述了五个处理器系统。 EISA总线用作主机接口,并且使用视觉总线用于在处理器之间传输图像。该系统用于自动非接触式检查,其中处理电光信号以识别制造问题。

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