embedded systems; multiprocessing systems; parallel processing; system-on-chip; PARSEC suite; SoC; VIPPE; correctness verification; design process; discrete-event simulation technique; multicore embedded systems; multicore host platform; multiprocessing capabilities; multiprocessing embedded systems; native simulation framework; parallel simulation; performance analysis; system-on-chips; virtual platforms; Accuracy; Computational modeling; Instruction sets; Instruments; Kernel; Schedules; Synchronization; Native simulation; embedded systems; parallel SW simulation; performance analysis;
机译:在多核嵌入式计算平台上并行实现的自动面部表情放大系统
机译:使用基于区域的即时动态二进制翻译对嵌入式多核处理器进行高效并行指令集仿真
机译:多核系统上的并行离散位错动力学仿真
机译:多核平台多核嵌入式系统的VIPPE,并行仿真和性能分析
机译:混合平台上的并行子图挖掘:HPC系统,多核和GPU。
机译:用于加速对照对传感系统并行/多核平台的非线性常微分方程的贡献
机译:多核系统上的并行离散位错动力学仿真