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INVESTIGATION OF ON-CHIP DOUBLE-SHIELED QHR DEVICE IN AC REGIME

机译:交流制度芯片上双震QHR装置的研究

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For the investigation of ac performance, two on-chip double-shielded QHR devices and two double-shielded chip carriers were fabricated at National Metrology Institute of Japan and have been studied with ac at Physikalisch-Technische Bundesanstalt. It has been measured that the shape of the i velence 2 plateaux at zero shield-potential is not flat and the linear frequency dependence of the quantum Hall resistance amounts to -0.14 ((mu)OMEGA/OMEGA)/kHz. Deferent shield designs are proposed to reduce the frequency dependence.
机译:在调查交流性能的调查中,在日本国家计量研究所制造了两种片上的双屏QHR器件和两台双屏蔽芯片载体,并在Physikalisch-Technische Bundesanstalt进行了ac。已经测量,零屏蔽电位的I Velence 2平台的形状不平坦,量子霍尔电阻的线性频率依赖性为-0.14((mu)ω/ω/ kHz。提出了推迟屏蔽设计以降低频率依赖性。

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