General-Purpose Clocked Gate Driver (CGD) IC with Programmable 63-Level Drivability to Reduce Ic Overshoot and Switching Loss of Various Power Transistors

摘要

A general-purpose clocked gate driver (CGD) IC to generate an arbitrary gate waveform is proposed to provide a universal platform for fine-grained gate waveform optimization handling various power transistors. The fabricated IC with 0.18μm BCD process has 63 PMOS and 63 NMOS driver transistors on a chip whose activation patterns are controlled by 6-bit digital signals and 25-MHz clock (=40-ns time step control). In the 500-V switching measurements, the proposed CGD reduces the I_c overshoot by 25% and 41% and the energy loss by 38% and 55% for Si-IGBT and SiC-MOSFET, respectively.