Design of a continuous-time ΣΔ modulator using the time domain quantization approach

摘要

Translation of the amplitude axis to the time axis can be a promising alternative to overcome the resolution problems in analog-to-digital conversion in low-voltage CMOS circuits. From this point of view, design of a continuous-time sigma-delta modulator (CTSDM) with time domain quantization is presented. The proposed structure utilizes an asynchronous pulse width modulator (APWM) in order to map the data from the amplitude to the time. A classic flash time-to-digital converter (TDC) is also employed to digitize the PWM signal. The TDC is designed based on dual-edge triggered D-filp-flops (DE-DFF) to enhance the time resolution. A simple digital-to-time converter (DTC) is combined with the TDC to feed the single bit DAC with a serial data stream. The modulator leverages a third order active loop filter to exhibit a -60dB/dec noise shaping behavior. The systematic simulation results show SFDR and SNDR more than 82 dB and 75 dB for 40 MHz BW and time resolution of 80 psec, respectively. A digital-friendly implementation of the modulator makes it suitable for low-voltage nanometer CMOS technologies.