CMOS integrated circuits; charge pump circuits; delay lock loops; phase detectors; CMOS technology; DLL; dead zone phase detector; delay lock loops; differential phase; mismatched differential pairs; reduced gain charge pump; small charge injection; Charge pumps; Clocks; Delays; Detectors; Jitter; Partial discharges; Pulse generation; Charge Pump; Dead-Zone; Delay Locked Loop; Low Jitter DLL; Phase Detector;
机译:基于改进的死区开环鉴相器和增益降低的电荷泵的80MHz至410MHz 16相DLL
机译:具有校准电荷泵的0.5–5 GHz宽范围多相DLL
机译:具有新型电荷泵相位比较器的基于DLL的锁定错误减少的时钟合成器
机译:基于改进的死区相检测器和减少增益泵的宽范围16相DLL
机译:使用相互泵浦的相位共轭器或环形谐振器对光折光束进行清理,以及半导体光放大器的增益谱。
机译:Zernike相板的测试方法以及有关减少充电和改善老化特性的硅基相板的报告
机译:带有校准电荷泵的0.5-5Go-GHz宽范围多相DLL