首页> 外文会议>IEEE International Conference on Electronics, Circuits and Systems >Maximizing the fundamental period of a dithered digital delta-sigma modulator with constant input
【24h】

Maximizing the fundamental period of a dithered digital delta-sigma modulator with constant input

机译:以恒定输入最大化抖动的数字Δ-Σ调制器的基本时期

获取原文

摘要

A digital delta-sigma modulator (DDSM) with a constant input may produce a periodic output with a small fundamental period, resulting in strong tonal output behavior instead of the classically predicted shaped white quantization noise. Pseudorandom dither generators based on linear feedback shift registers (LFSRs) are widely used to “break up” periodic cycles in DDSMs with constant inputs. Pseudorandom dither signals are themselves periodic and can lead to relatively short output sequences from dithered DDSMs. It has been shown, for a MASH comprising a cascade of first-order sections, that the fundamental period of the output signal depends not only on the input and initial condition of the DDSM but also on the initial state of the LFSR. This work extends the analysis to a larger class of DDSM architectures.
机译:具有恒定输入的数字Δ-Sigma调制器(DDSM)可以产生具有小基本周期的周期性输出,导致色调输出行为强,而不是经典预测的形状的白色量化噪声。基于线性反馈移位寄存器(LFSR)的伪随机发电机广泛用​​于“分解”在具有恒定输入的DDSM中的周期性周期。伪随机抖动信号本身是周期性的并且可以导致来自抖动DDSMS的相对较短的输出序列。已经示出了,对于包括级联第一阶段的碎片,输出信号的基本周期不仅取决于DDSM的输入和初始条件,还取决于LFSR的初始状态。这项工作将分析扩展到更大类别的DDSM架构。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号