Analog behavioral modeling for age-dependent degradation of complex analog circuits

摘要

Analog circuit performance are degrading by effects like HCI and NBTI. These performance shifts need to be evaluated by the designer to meet given specifications. The evaluation on transistor level enables an accurate prediction of degradation behavior for a chosen circuit. However, this task is very time-consuming for complex analog circuitry. This paper proposes the use of response surface modeling for age-dependent degradation. The generated model is used to extend analog behavioral descriptions and for an accelerated system level analysis. The proposed age-dependent degradation model is demonstrated on a common source amplifier and an analog frontend for the measurement of neural activities. Simulation results demonstrate the accuracy and simulation acceleration of the proposed modeling method.