Revisit resistance monitoring techniques for measuring TSV/Solder resistance during Electromigration test

摘要

TSV and micro-Solder bump are key interconnects for 2.5D and 3D Integrated circuit (IC) chips, and being part of interconnects for IC, their Electromigration reliability must be assessed. However, their resistances are much smaller than that of interconnect lines in IC, and this renders difficulty in having accurate resistance monitoring of TSV and micro-solder bump during their Electromigration tests. In this work, we demonstrated the inappropriateness and inadequacies of the conventional resistance monitoring methods and their manifold improvement in measurement accuracy by mere changing the design of the test structure. The new structure can also reduce the impact of the interconnect lines that lead to the TSV and/or micro-Solder bump on their resistance measurement accuracy.