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Dataflow/Actor-Oriented language for the design of complex signal processing systems

机译:DataFlow / actor导向语言,用于复杂信号处理系统的设计

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Signal processing algorithms become more and more complex and the algorithm architecture adaptation and design processes cannot any longer rely only on the intuition of the designers to build efficient systems. Specific tools and methods are needed to cope with the increasing complexity of both algorithms and platforms. This paper presents a new framework which allows the specification, design, simulation and implementation of a system operating at a higher level of abstraction compared to current approaches. The framework is base on the usage of a new actor/dataflow oriented language called CAL. Such language has been specifically designed for modelling complex signal processing systems. CAL data flow models expose the intrinsic concurrency of the algorithms by employing the notions of actor programming and dataflow. Concurrency and parallelism are very important aspects of embedded system design as we enter in the multicore era. The design framework is composed by a simulation platform and by Cal2C and CAL2HDL code generators. This paper described in details the principles on which such code generators are based and shows how efficient software (C) and hardware (VHDL and Verilog) code can be generated by appropriate CAL models. Results on a real design case, a MPEG-4 Simple Profile decoder, show that systems obtained with the hardware code generator outperform the hand written VHDL version both in terms of performance and resource usage. Concerning the C code generator results, the results show that the synthesized C-software mapped on a SystemC scheduler platform, is much faster than the simulated CAL dataflow program and approaches handwritten C versions.
机译:信号处理算法变得越来越复杂,并且算法架构适应和设计过程不能再依赖于设计人员的直觉来构建高效的系统。需要特定的工具和方法来应对两种算法和平台的越来越多的复杂性。本文介绍了一个新的框架,它允许在与当前方法相比以更高的抽象级别运行的系统的规范,设计,仿真和实现。该框架是基于一个名为Cal的新演员/数据流导向语言的基础。这种语言专门用于建模复杂信号处理系统。 CAL数据流模型通过采用演员编程和数据流的概念来公开算法的内在并发性。正如我们在多核时代进入的那样,并发和并行性是嵌入式系统设计的非常重要的方面。设计框架由仿真平台和CAL2C和CAL2HDL代码生成器组成。本文详细描述了这些代码生成器所基于的原则,并显示了可以通过适当的CAL模型生成效率(C)和硬件(VHDL和VERILOG)代码的效率。结果在实际设计案例上,一个MPEG-4简单的配置文件解码器,显示使用硬件代码生成器获得的系统在性能和资源使用方面均胜过手写的VHDL版本。关于C代码生成器结果,结果表明,映射在SystemC调度程序平台上的合成C软件比模拟的CAL DataFlow程序更快,并接近手写C版本。

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