circuit optimisation; integrated circuit design; network routing; network-on-chip; telecommunication traffic; 2D mesh network; CMOS; NoC router design; NoC router microarchitectures; STORM; dimension-order routing; equivalent buffer resources; many-core chips; network saturation throughput; networks-on-chip; on-chip communication; packet latencies; simple traffic-optimized router microarchitecture; size 45 nm; traffic pattern biases; Computer architecture; Microarchitecture; Ports (Computers); Resource management; Storms; Switches; Throughput;
机译:片上网络的扩展Torus路由算法:动态可重新配置片上网络的路由算法
机译:片上网络中同步通信的低复杂度链路微体系结构
机译:片上网络中同步通信的低复杂度链路微体系结构
机译:风暴:用于片上网络的简单交通优化路由器微架构
机译:片上网络的高度模块化路由器微体系结构
机译:基于Dijkstra算法在芯片上的Dijkstra算法探索新的自适应路由
机译:片上网络的扩展Torus路由算法:动态可重新配置片上网络的路由算法