An analog front-end circuit with spike detection for implantable neural recording system design

摘要

A low power, low noise implantable neural recording interface for use in a power harvested inductive coupling system is presented in this paper. A two stage neural amplifier, selective reference thresholder and a serial communication interface form the neural data logger. The midband gain of neural amplifier is 59.1dB with a 3dB bandwidth from 0.45 to 8 kHz. Input-referred noise and total power consumption are 8.7µVrms and 3.19µW respectively at less than 1 V. The thresholder detects/quantizes the amplified neural signal at sampling rate of 20 kHz with four code selectable reference voltages. The 8 bit serial digits are transmitted via light emitting diode (LED) to a photo detector interface. The chip is designed and fabricated in 0.18-µm process. The simulation result demonstrates the neural recording interface's suitability for instu neutral activity recording.