A reconfigurable Continuous-Time ΔΣ-ADC using a digitally programmable g_m-C Array

摘要

This work presents a reconfigurable continuous-time (CT) ΔΣ analog-to-digital converter (ADC) using a digitally programmable g_m-C array. The respective modulator is implemented in a field programmable analog array (FPAA) architecture with an additional operational amplifier as the first stage and a 1-bit quantizer. The hexagonal structure of the FPAA allows up to 7th order lowpass (LP) and up to 3rd order bandpass (BP) ΔΣ structures. At first, the system is implemented as a LTI-model in MATLAB. The feasibility of the proposed design is shown by simulations at transistor-level in TSMC 90 nm CMOS technology.