SoIS- An Ultra Large Size Integrated Substrate Technology Platform for HPC Applications

摘要

An Innovative SoIS (System on Integrated Substrate) technology is proposed to satisfy higher performance applications cost effectively. SoIS technology leverages wafer process and new materials. This innovative integrated substrate presented significantly higher yield than conventional substrate solutions on the TVs with 91x91mm2 substrate size. The electrical TV showed that the insertion loss is 25% lower than that of the most updated GL102 organic substrate at 28GHz for 112Gbps SerDes application. The mechanical/electrical TV has passed package-level reliability tests including MSL4+ (TCG2000, uHAST360) and HTS1500. Microstructure sanity check after reliability torture tests was also proven to pass quality & reliability criteria. Furthermore, by leveraging wafer fab process, SoIS also could provide powerful yet flexible combinations in interconnect and dielectric layer with more aggressive design rule than conventional organic substrate did. Especially, for high bandwidth routing density applications, SoIS can enhance 2∼5 times rout-ability than conventional organic substrates to save not just layer counts but also keep the same impedance matching performance without adding extra cost, which have been proven by simulation and Si data successfully.