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Design of a 4.5-V, 450-mA low-dropout voltage linear regulator based on a cascoded OTA

机译:基于级联OTA的4.5V,450mA低压差线性稳压器的设计

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This article aims to present the design of a 4.5-V, 450-mA low drop-out (LDO) voltage linear regulator based on a two-stage cascoded operational transconductance amplifier (OTA) as error amplifier. The aforementioned two-stage OTA is designed with cascoded current mirroring technique to boost up the output impedance. The proposed OTA has a DC gain of 101 dB under no load condition. The designed reference voltage included in the LDO regulator is provided by a band gap reference with the temperature coefficient (Tγ) of 0.025 mV/°C. The proposed LDO regulator has a maximum drop-out voltage of 0.5 V @ 450 mA of load current, and has the worst case power supply rejection ratio (PSRR) of [54.5 dB, 34.3 dB] @ [100 Hz, 10 kHz] in full load condition. All the proposed circuits are designed using a 0.35 µm CMOS technology. The design is checked in order to corroborate its performance for wide range of input voltage, founding that the circuit design works fine meeting all the initial specification requirements.
机译:本文旨在介绍一种基于两级级联运算跨导放大器(OTA)作为误差放大器的4.5V,450mA低压降(LDO)电压线性稳压器的设计。前述的两级OTA采用级联电流镜技术设计,以提高输出阻抗。拟议的OTA在空载条件下的直流增益为101 dB。 LDO稳压器中包含的设计基准电压由温度系数(Tγ)为0.025 mV /°C的带隙基准提供。拟议的LDO稳压器在450 mA负载电流下的最大压降为0.5 V,在[100 Hz,10 kHz]时的最坏情况下电源抑制比(PSRR)为[54.5 dB,34.3 dB]。满负荷条件。所有建议的电路均采用0.35 µm CMOS技术进行设计。检查设计以证实其在宽输入电压范围内的性能,发现电路设计可以很好地满足所有初始规格要求。

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