FPGA implementation of a HART-Ethernet smart industrial interface

摘要

FPGA implementation represents a widely accepted method to test various prototype systems regarding technological process control. In order to support the developer to integrate legacy devices in new industrial Ethernet environment, it was proposed an original smart IEEE 1451 compliant interface in order to connect HART devices to the Ethernet network. As follows, it will be exposed the design of a physical circuit, based on a Virtex 4 FPGA developed by Xilinx, which implements the functionality of the HART-Ethernet Intelligent Subsystem (HEIS).