Analyzing the improvement in efficiency through the integration of class-F power amplifiers compared to class-AB in an envelope tracking architecture

摘要

This paper investigates the performance of a class-F mode power amplifier (PA) integrated in an envelope tracking (ET) environment, compared to the conventional class-AB mode of operation in the same setting. A 10W high voltage laterally diffused metal oxide semiconductor (HVLDMOS) device is used to perform the comparison at 900MHz using an active load pull system in an emulated ET environment at 900MHz. The analysis looks at three scenario of optimization: when the class-F and class-AB PA's are optimized at individual drain voltage within the ET range, optimized at peak drain voltage, and optimized at the average drain voltage. The challenges of maintaining the device in class-AB and class-F modes throughout the ET range due to the variation of the device output capacitance are also presented in terms of the trajectory of the fundamental and harmonic loads, as well as the degradation in drain efficiency.