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Run-Time Slack Distribution for Real-Time Data-Flow Applications on Embedded MPSoC

机译:嵌入式MPSoC上实时数据流应用程序的运行时松弛分配

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Low energy consumption is crucial for embedded systems, including the ones that employ tiled Multiprocessor Systems-on-Chip(MPSoC). Such systems often execute real-time applications consisting of several tasks synchronized in a data-flow manner and mapped over different MPSoC tiles. Energy can be saved by lowering the processor voltage and frequency, hence extending the application execution over periods of time otherwise left idle, i.e., exploiting slack. In this paper we propose a framework to distribute slack information at run-time, intra-and inter-tile, to enable accurate and conservative slack calculation within each tile. The slack is transferred along with the existing inter-task synchronization and as a result it is distributed across the MPSoC with low overhead. In each tile, we add a hardware block that calculates the slack received during inter-tile communication and a software library to program this hardware. We integrate this framework into an existing MPSoC platform and we prototype an entire system with two tiles on an Xilinx ML605 FPGA board. We demonstrate the effectiveness of our proposal with a simple, conservative, DVFS management policy applied to an H.264 decoder application. The experimental results suggest that our framework reduces %the average processors frequency with 56% and the energy consumption with 53%, the total energy consumption of tiles with 27%, when compared to a state-of-the-art intra-tile approach that uses a similar management policy. Our proposal introduces only a minor software overhead of up to 4% over the application execution time and negligible additional FPGA chip utilization of 0.002%.
机译:低能耗对于嵌入式系统至关重要,包括采用平铺式多处理器片上系统(MPSoC)的嵌入式系统。此类系统通常执行实时应用程序,该应用程序包含以数据流方式同步并映射到不同MPSoC Tile上的多个任务。可以通过降低处理器电压和频率来节省能量,从而将应用程序的执行时间延长,否则将处于闲置状态,即利用闲置时间。在本文中,我们提出了一个框架,用于在运行时,块内和块间分发松弛信息,以便在每个图块中进行准确而保守的松弛计算。松弛与现有的任务间同步一起传输,因此,它以较低的开销分布在整个MPSoC上。在每个图块中,我们添加一个计算模块间通信期间接收到的松弛的硬件模块,以及一个对该硬件进行编程的软件库。我们将此框架集成到现有的MPSoC平台中,并在Xilinx ML605 FPGA板上使用两个图块对整个系统进行原型制作。我们通过将简单,保守的DVFS管理策略应用于H.264解码器应用程序来证明我们的建议的有效性。实验结果表明,与最先进的块内方法相比,我们的框架将平均处理器频率降低了56%,能耗降低了53%,瓷砖的总能耗降低了27%。使用类似的管理策略。我们的建议仅在应用程序执行时间内引入了高达4%的次要软件开销,而额外的0.002%的FPGA芯片利用率则可以忽略不计。

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