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Reliability assessment of discrete passive components embedded into PCB core

机译:嵌入到PCB核心的离散被动组件的可靠性评估

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This paper will present the research results for reliability of two embedding technologies in comparison to the current standard - surface mount technology. The chosen embedding approaches utilize a cavity to place the necessary components into the PCB core. The difference is found in the way the component is connected to the PCB routing. For the first approach the circuit is first assembled on a carrier substrate using conventional surface mount technology (SMT). The solder paste is printed, the components are placed and the substrate board is soldered afterwards. The base substrate is then put together with prepared additional layers holding preformed cavities at the component locations. After another top layer has been added, the stack is finally laminated and the components are placed in the PCB core. The second approach is based on placing the components, then putting together the stack-up as described earlier and followed also with the laminating process. However the components have not been soldered. Instead an opening to the component's terminals is created through laservias. Then galvanic deposition is utilized to establish the connection to the PCB routing. For a comparison of the technologies samples with embedded resistors and ceramic capacitors in various sizes for the technologies as well as standard SMT have been prepared. To assess the reliability potential the samples have undergone temperature cycling tests. The testing is supported with FEM simulations which aided in the detection of critical design parameters and assess the residual manufacturing stress/strain states. The results of the investigations have shown that the damage mechanisms and predominant failure sites of the SMT & Cavity embedding variant is significantly different from conventional SMT. Here the resin material should be adopted to increase lifetimes even more. In the case of Microvia & Cavity the geometry of the microvia is essential towards the achievable reliabilit- . Overall the results indicate the increased reliability potential of the novel approaches.
机译:本文将介绍与当前标准 - 表面贴装技术相比,两个嵌入技术的可靠性研究结果。所选择的嵌入方法利用空腔将必要的组件放入PCB芯中。在组件连接到PCB路由的方式中找到了差异。对于第一方法,首先使用传统的表面安装技术(SMT)在载体基板上组装电路。打印焊膏,放置部件,然后焊接基板板。然后将基础基板与在部件位置处保持预成型腔保持的制备的附加层组合在一起。在添加另一个顶层之后,最终层叠堆叠,并且将部件放置在PCB芯中。第二种方法是基于将部件放置,然后如前所述将堆叠放在一起,并遵循层压过程。然而,组件尚未焊接。相反,通过LASERVIAS创建对组件终端的开放。然后利用电流沉积来建立与PCB路由的连接。为了对技术的嵌入式电阻器和陶瓷电容器进行比较,可以制备各种尺寸的嵌入式电阻器和陶瓷电容器以及标准SMT。为了评估可靠性潜力,样品经历了温度循环试验。在检测到临界设计参数中的有限模拟中支持测试,并评估残余制造应力/应变状态。研究结果表明,SMT和腔内嵌入变体的损伤机制和主要衰竭部位与常规SMT显着不同。这里应该采用树脂材料来增加寿命。在Microvia&腔的情况下,微径的几何形状对于可实现的可靠性 - 而是必不可少的。总体而言,结果表明新方法的可靠性潜力增加。

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