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An inductorless 34 Gbit/s half-rate 4:1 multiplexer in 0.25-#x03BC;m SiGe technology

机译:无电感34 Gbit / s半速率4:1多路复用器在0.25-μmsige技术中

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This paper demonstrates a 34 Gbit/s 4:1 multiplexer with 200 mW power dissipation in a 0.25-μm SiGe process. A multiphase clock architecture at half-rate clock is chosen to reduce the power dissipation. In addition, stability issues caused by the capacitively loaded clock driver are studied and a solution is proposed with a suitable compensation circuit. Measurement results are presented as well. The output signals yield open eye diagrams at the highest available test rate of 34 Gbit/s, while presenting rise and fall times below 12 ps.
机译:本文演示了34 Gbit / s 4:1多路复用器,在0.25微米的SiGe过程中具有200 MW功耗。选择半速率时钟的多相时钟架构以减少功耗。另外,研究了由电容加载的时钟驱动器引起的稳定性问题,并提出了具有合适补偿电路的解决方案。还提出了测量结果。输出信号以34 Gbit / s的最高可用测试速率产生张开眼图,同时提出上升和下降时间低于12 ps。

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